The design and development of systems requires extensive analysis and assessment of the design space, not only due to the assorted nature of design parameters, but also due to the diversity in architecture for implementation. Given specifications and system requirements, the aim of designers is to reduce a large and complex design space into a set of feasible design solutions meeting performance objectives and functionality.
For systems based on operational constraints the selection of an optimal architecture for system design is an important step in the development process. Design space architecture can have innumerable design options for selection and implementation based on the parameters of optimization. Selection of the optimal architecture from the design space that satisfies all the performance parameter objectives may be useful for the present generation of System-on-chip (SoC) designs and Very Large Scale Integration (VLSI) design. As it is possible to implement different functions of a system on different hardware components, the architecture design space becomes more complex to analyze. In the case of high level synthesis, performing design space exploration to choose candidate architecture by concurrently satisfying many operating constraints and performance parameters is considered an important stage in the whole design flow. Since the design space is huge and complex there exists a desire to efficiently explore candidate architectures for the system design based on the application to be executed. The method for exploration of candidate architecture should not only be less in terms of complexity factor and time but should also explore the variant in an efficient way meeting specifications provided. The process of high-level synthesis design is very complicated and descriptive and is usually performed by system architects. Depending on the application, the process of defining the problem, performing design space exploration and the other steps required for its successful accomplishment may be very time consuming. Furthermore, recent advancements in areas of communications and multimedia have led to the growth of a wide array of applications requiring huge data processing at minimal power expense. Such data hungry applications demand satisfactory performance with power efficient hardware solutions. Hardware solutions should satisfy multiple contradictory performance parameters such as power consumption and time of execution, for example. Since the selection process for the best design architecture is complex, an efficient approach to explore the design space for selecting a design option is desirable.